Planar Inductors for Microwave Acoustic Filter Integration in LTCC Technology

Abstract

Over the years, the mobile communication technology has undergone tremendous revolutionary changes, transforming an ordinary cell phone into a mobile entertainment and networking platform. The current trend is towards a bigger screen and thin profile which put a lot of challenge in integration and miniaturization of passives on board. At this stage, factors like performance, power durability, yield, etc become a main concern. As a designer of a multimode multilayered ceramic front end module, there is not much degree of freedom to design and tweak the system to be able to compete with the rapidly progressing market demand. When designing an LTCC (Low Temperature Co-fired Ceramic) based complex front end module, the reduction in chip sizes introduce quite a bit of constraints. When such a complex module is sent to production, the production tolerances come into play. For a module to be electrically specified, various tolerances should be taken into account because it causes shift or deterioration in performance. The main goal is to design the circuit in such a way that the specification failures are kept to a minimum in order to maximize the backend test yield. Total failures are controlled by the process engineers which is outside the scope of a design engineer. As long as the design engineer follows the design guidelines which are recommended by the process engineering team, the total failures are kept to the minimum. But controlling the specification failure is challenging since the degree of freedom is greatly reduced due to parameters like miniaturized module size and complexity in addition to the fact there are only 2 elements that are integrated, namely, inductors and capacitors. Capacitors are fairly easy to compensate against the production shifts. The inductor, on the contrary, is hard to design and make it less sensitive towards the tolerance shifts. One can design, e.g., a 6 nH inductor in different geometrical configurations. By studying various models of an inductor for one specified circuit, the designer can choose the one which has relatively higher Q and also the least sensitive, which is best suited for that specific design. Since higher Q leads to a steeper skirt, it is possible to gain some margin at tougher attenuation specifications. In this way, one gains additional margin at tighter specifications which reduce the specification failures at that specification point. In this research work, the original contribution is towards the approach for high level integration and test yield optimization at the design level. It is demonstrated in three steps. In the first step a Band VIII duplexer is integrated onto a state of the art front end LTCC module. The challenge is to integrate a duplexer whose height is larger than required which will increase the total module height. To solve this bottleneck, the carrier of the duplexer is eliminated which housed the phase shifter network to isolate TX and RX paths. Instead, the phase shifter CLC network is manually rebuilt and integrated in the multilayered LTCC stack. This module is successfully built and mass produced with reasonably good backend test yield. In the second step, a case study is conducted on an inductor subjected to various changes in geometry related to production shifts. Numerous simulations are performed on a single turn and spiral type inductor by creating layer shifts, varying layer heights and permittivity. All of the above mentioned simulations in turn were done under various real life situations that an inductor faces in a densely packed module. From this a database of information is created highlighting the behavior of the inductor under various situations, which provides an insight to the designer to integrate both the environment and its effects. Finally, a 2 GHz TX low pass filter is designed and built to prove that the proper choice of the inductor can create an additional degree of freedom or margin in real life situations involving stringent specifications where production shift might cause a failed part. This in turn means that the circuit is more robust and tolerant to production shifts. As a result the test yield is essentially improved by countering the potential threats at the design stage. Show more