A Low-Power RRAM Memory Block for Embedded, Multi-Level Weight and Bias Storage in Artificial Neural Networks

Language
en
Document Type
Article
Issue Date
2021-11-09
First published
2021-10-20
Issue Year
2021
Authors
Pechmann, Stefan
Mai, Timo
Potschka, Julian
Reiser, Daniel
Reichel, Peter
Breiling, Marco
Reichenbach, Marc
Hagelauer, Amelie
Editor
Publisher
MDPI
Abstract

Pattern recognition as a computing task is very well suited for machine learning algorithms utilizing artificial neural networks (ANNs). Computing systems using ANNs usually require some sort of data storage to store the weights and bias values for the processing elements of the individual neurons. This paper introduces a memory block using resistive memory cells (RRAM) to realize this weight and bias storage in an embedded and distributed way while also offering programming and multi-level ability. By implementing power gating, overall power consumption is decreased significantly without data loss by taking advantage of the non-volatility of the RRAM technology. Due to the versatility of the peripheral circuitry, the presented memory concept can be adapted to different applications and RRAM technologies.

Journal Title
Micromachines
Volume
12
Issue
11
Citation
Micromachines 12.11 (2021): 1277. <https://www.mdpi.com/2072-666X/12/11/1277>
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