Poor time predictability of multicore processors has been a long-standing challenge in the real-time systems community. In this paper, we make a case that a fundamental problem that prevents efficient and predictable real-time computing on multicore is the lack of a proper memory abstraction to express memory criticality, which cuts across various layers of the system: the application, OS, and hardware. We, therefore, propose a new holistic resource management approach driven by a new memory abstraction, which we call Deterministic Memory. The key characteristic of deterministic memory is that the platform-the OS and hardware-guarantees small and tightly bounded worst-case memory access timing. In contrast, we call the conventional memory abstraction as best-effort memory in which only highly pessimistic worst-case bounds can be achieved. We propose to utilize both abstractions to achieve high time predictability but without significantly sacrificing performance. We present deterministic memory-aware OS and architecture designs, including OS-level page allocator, hardware-level cache, and DRAM controller designs. We implement the proposed OS and architecture extensions on Linux and gem5 simulator. Our evaluation results, using a set of synthetic and real-world benchmarks, demonstrate the feasibility and effectiveness of our approach.
@InProceedings{farshchi_et_al:LIPIcs.ECRTS.2018.1, author = {Farshchi, Farzad and Valsan, Prathap Kumar and Mancuso, Renato and Yun, Heechul}, title = {{Deterministic Memory Abstraction and Supporting Multicore System Architecture}}, booktitle = {30th Euromicro Conference on Real-Time Systems (ECRTS 2018)}, pages = {1:1--1:25}, series = {Leibniz International Proceedings in Informatics (LIPIcs)}, ISBN = {978-3-95977-075-0}, ISSN = {1868-8969}, year = {2018}, volume = {106}, editor = {Altmeyer, Sebastian}, publisher = {Schloss Dagstuhl -- Leibniz-Zentrum f{\"u}r Informatik}, address = {Dagstuhl, Germany}, URL = {https://drops.dagstuhl.de/entities/document/10.4230/LIPIcs.ECRTS.2018.1}, URN = {urn:nbn:de:0030-drops-90010}, doi = {10.4230/LIPIcs.ECRTS.2018.1}, annote = {Keywords: multicore processors, real-time, shared cache, DRAM controller, Linux} }
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